VerifAIX Raises $5 Million Seed Funding to Scale AI-Powered Semiconductor Verification

AI-native semiconductor verification startup VerifAIX has raised $5 million in seed funding in a round co-led by Endiya Partners and Bluehill VC, marking the company’s first institutional fundraise.

The company plans to use the capital to advance its verification platform, expand customer deployments and grow its engineering teams across the US, India and Israel. VerifAIX had previously raised capital from angel investors and industry advisers.

Founded in 2024 by Madhulima Tewari, Kenneth Roe and Avner Landver, VerifAIX is building an AI-native platform for semiconductor verification. The company says its platform is already deployed with multiple semiconductor companies on real-world verification challenges, including designs involving complex control logic and protocols.

At the centre of the platform is what VerifAIX calls a “Formal Brain”, a formally grounded representation of a chip that brings together specifications, register-transfer-level (RTL) design and existing verification assets. The system uses this model to maintain traceability between design requirements and downstream verification work.

The platform is designed to analyse specifications and RTL before generating verification outputs, identifying gaps and inconsistencies between what the specification requires and what has been implemented. It then uses specialised AI agents to generate verification plans, testbenches, assertions and coverage workflows, while connecting with existing electronic design automation (EDA) tools.

VerifAIX combines AI reasoning with formal methods rather than relying only on AI-generated verification code. Its workflow covers specification auditing, verification planning, formal analysis, simulation, coverage, debugging and closure. The company also highlights specification-to-RTL reasoning, automated abstraction and decomposition, and coordination between formal and simulation-based verification.

The company says its approach is intended to address a limitation of ungrounded AI-based verification, where generated outputs may not have an independent reference to the actual design specification. Its Formal Brain is instead designed to provide a common model against which verification outputs can be traced and evaluated.

VerifAIX is targeting semiconductor and IP companies, custom-silicon developers, processor and AI-accelerator makers, hyperscalers and systems companies. The platform is designed to work with existing EDA tools and verification flows rather than requiring teams to replace their established toolchains.

The company’s founding team brings experience across AI, semiconductor design, formal verification and EDA. Kenneth Roe has worked on formal verification infrastructure at Intel and has also held roles at SiFive and Synopsys, while Avner Landver has experience in verification methodology and EDA from organisations including Apple, Intel, Cadence and IBM Research. Madhulima Tewari’s background spans AI, enterprise software and semiconductor EDA. Princeton University professor Dr Aarti Gupta serves as a founding consultant, while Vin Dham, a co-creator of the Intel Pentium processor, is a founding adviser and investor.

The funding comes as India’s semiconductor startup ecosystem continues to attract larger private investments. According to the Indian Semiconductor Startup Landscape 2026 report by Speciale Invest and the Startup Policy Forum, homegrown semiconductor startups raised $61.9 million across seven rounds in the first half of 2026, taking cumulative funding since 2022 to approximately $206 million across 51 rounds. The report also found that 14 of the 24 chip-design startups supported under the Design Linked Incentive programme subsequently raised institutional venture capital, collectively securing $100.8 million across their first and second rounds.